Semiconductor devices have been highly integrated to satisfy consumer demands for superior performance and inexpensive prices for electronic devices. In the case of semiconductor devices, since their integration degree is an important factor in determining product price, increased integration is especially desired. The integration level of typical two-dimensional or planar semiconductor memory devices is primarily determined by the area occupied by a unit memory cell. Accordingly, in such devices, integration is greatly influenced by the level of fine pattern forming technology used in their manufacture. However, the extremely expensive processing equipments needed for increasing pattern fineness may set a practical limitation on increasing integration for two-dimensional or planar semiconductor devices.
To overcome such a limitation, three-dimensional semiconductor memory devices having three-dimensionally arranged memory cells have been proposed. However, new process technologies capable of reducing manufacture costs and improving reliability should be developed in order to mass produce three-dimensional semiconductor memory devices.